FET: SMALL: A Heterogeneous System Approach Toward Early Fault-Tolerant Quantum Computing

Quantum computers promise to solve problems far beyond the reach of today's most powerful conventional machines, with potential benefits for drug discovery, materials design, and secure communication. However, quantum qubits are extremely sensitive to noise, and protecting quantum calculations from the resulting errors is the central obstacle to building useful quantum computers. Current protection strategies apply a single, uniform error correction scheme across the whole machine, demanding far more hardware than near-term devices can provide. This project aims to enable modest but meaningful levels of quantum error correction that facilitate applications beyond the noisy intermediate-scale quantum era without the cost of fully scalable, fault-tolerant systems. It develops a new approach that combines several different error-protection techniques within the same machine, assigning each to the task for which it is best suited. This project develops a system-level framework that assigns specialized quantum error correction (QEC) codes to specialized roles. The project is organized into three thrusts. The first thrust establishes architectural principles for heterogeneous QEC systems, including a hierarchical quantum memory that pairs high-density codes for storage with faster codes for in-memory access, hybrid compute schemes that combine encoded and bare-qubit operations to lower the cost of compute-intensive tasks, and layout strategies that map heterogeneous components onto hardware while managing communication overhead. The second thrust develops compiler infrastructure that bridges quantum programs to heterogeneous architectures, providing code-aware logical gate synthesis, inter-code conversion protocols, latency-aware qubit mapping and scheduling, and back-end support specialized to distinct hardware platforms. The third thrust builds an evaluation framework that characterizes individual QEC modules using standardized metrics, composes them into system-level simulations of full early-fault-tolerance workloads, and quantifies fidelity and resource tradeoffs to guide architecture and compiler co-design. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria. NSF Award ID: 2534655 | Program: 01002627DB NSF RESEARCH & RELATED ACTIVIT | Principal Investigator: Yufei Ding | Institution: University of California-San Diego, LA JOLLA, CA | Award Amount: $600,000 View on NSF Award Search: https://www.nsf.gov/awardsearch/show-award/?AWD_ID=2534655 View on Research.gov: https://www.research.gov/awardapi-service/v1/awards/2534655.html