CAREER: Efficient and Scalable Neuro-Symbolic Cognitive Computing on Three-Dimensional Integrated Circuits and Systems

From smart devices to data centers, future artificial intelligence (AI) will need stronger capabilities for reasoning, logical thinking, and multi-step problem solving in dynamic real-world environments. Neuro-symbolic AI, which combines the strengths of neural networks and symbolic reasoning, is a promising direction for giving AI systems these capabilities. Yet such workloads remain difficult to run efficiently on today’s computing platforms because they place stringent demands on hardware performance, energy efficiency, programmability, and scalability. This project addresses that gap by developing new computing foundations for neuro-symbolic AI through cross-stack co-design, specialized memory technologies, and advanced three-dimensional integration. The goal is to create versatile, efficient, and scalable computing chips and systems that support more capable, real-time cognitive AI. In parallel, the project will develop new course materials and hands-on learning experiences in neuro-symbolic AI and semiconductors for students and K-12 educators, enhancing participation and literacy while helping prepare a future semiconductor workforce. Together, these integrated research and education activities will advance the computing foundations needed for future AI systems that can reason, respond, and assist more effectively across many real-world domains. The project develops versatile, efficient, and scalable neuro-symbolic computing platforms on three-dimensional integrated circuits and systems. The research is organized around four interwoven thrusts. These include (1) establishing a co-design framework that bridges neuro-symbolic models, memory-centric architectures, and system-technology co-optimization across silicon CMOS, emerging devices, and 3D integration schemes; (2) building efficient yet programmable neuro-symbolic accelerator chips that exploit heterogeneous silicon and beyond-silicon compute-in-memory (CIM) fabrics together with a CIM-native, neuro-symbolic instruction set architecture; (3) developing tailored 3D integrated systems that combine new reconfigurable memory primitives and 3D stacking schemes enabled by CMOS-compatible oxide-semiconductor logic and ferroelectric transistors; and (4) creating a neuro-symbolic chiplet macro compiler that generates modular, silicon-calibrated hardware macros to enable a closed-loop workflow for continued algorithm-hardware co-design. Collectively, these efforts will advance the performance, efficiency, scalability, and programmability frontiers of neuro-symbolic computing systems. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria. NSF Award ID: 2543547 | Program: 01002930DB NSF RESEARCH & RELATED ACTIVIT,01002627DB NSF RESEARCH & RELATED ACTIVIT,01003031DB NSF RESEARCH & RELATED ACTIVIT | Principal Investigator: Haitong Li | Institution: Purdue University, WEST LAFAYETTE, IN | Award Amount: $366,820 View on NSF Award Search: https://www.nsf.gov/awardsearch/show-award/?AWD_ID=2543547 View on Research.gov: https://www.research.gov/awardapi-service/v1/awards/2543547.html